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Polysilicon Standard Technology

Creating wafers with the Poly MEMS process will result in a chip with eight layers: nitride, three polysilicon layers, metal, two sacrificial oxide layers, and a substrate.

poly-overview

Thickness (µm) Resistance (Ω/□)Residual stress (MPa)Purpose
Nitride0.60 ± 0.07 N/A 90 ± 90 This layer insulates the silicon layers from the substrate layer.
Polysilicon 00.50 ± 0.03 30 ± 15 -25 ± 25 This layer can be used for mechanical structures, resistor structures, and electrical routing.
Oxide 12.00 ± 0.25 N/A N/A This layer is a sacrificial layer that supports the polysilicon layers during manufacturing but will ultimately be removed.
Polysilicon 12.00 ± 0.15 10.5 ± 9.5 -10 ± 10 This layer can be used for mechanical structures and resistor structures.
Oxide 20.75 ± 0.08 N/A N/A This layer is a sacrificial layer that supports the polysilicon layers during manufacturing but will ultimately be removed.
Polysilicon 21.50 ± 0.10 20 ± 10 -10 ± 10 This layer can be used for mechanical structures and resistor structures.
Metal0.52 ± 0.06 0.06 ± 0.01 50 ± 50 This layer is useful for bond pads, electrical routing, or optical mirrors.
Substrate- - - -

Examples


SEM photo of a platform suspended with standing structures at the microscopic scale SEM photo of a standing plate with through-holes patterned in a similar manner to a fresnel lens SEM photo of a microscopic catapult with metal coils to store potential energy SEM phot of a microscopic motor capable of one dimension of movement
Microthermal isolation platform Fresnel-zone plate assembled by fluid flow World's smallest catapult Linear stepper motor

Images courtesy of the School of Engineering Science at Simon Fraser University