The Piezo MEMS process uses five masks to pattern and etch the wafer layers. The process uses 6 in wide, n-type, double-side polished silicon-on-insulator (SOI) wafers with a 10 µm thick device layer. The buried oxide layer has no mask that directly patterns it, but it can be etched using the TRENCH mask and DRIE techniques.
| Step 1 The top silicon layer is doped with PSG. |
| Step 2 The PSG is removed and a 200 nm pad oxide is grown. |
| Step 3 The top of the wafer is coated in photoresist. |
| Step 4 The photoresist is patterned with the light field PADOXIDE mask. |
| Step 5 The patterned photoresist guides the etch of the pad oxide—this is a RIE etch. |
| Step 6 The photoresist is removed. |
| Step 7 A layer of piezoelectric film is deposited over the wafer via reactive sputtering. |
| Step 8 The top of the wafer is coated with photoresist. |
| Step 9 The photoresist is patterned with the light field PZFILM mask. |
| Step 10 The patterned photoresist guides the etch of the piezoelectric film—this is a wet etch. |
| Step 11 The photoresist is removed. |
| Step 12 The top of the wafer is once again coated in photoresist. |
| Step 13 The photoresist is patterned with the light field PADMETAL mask. |
| Step 14 The pad metal layer is deposited into the gaps of the photoresist via electron beam evaporation. |
| Step 15 The photoresist is removed. |
| Step 16 The top of the wafer is coated in photoresist again. |
| Step 17 The photoresist is patterned with the light field SOI mask. |
| Step 18 The patterned photoresist guides the etch of the pad oxide layer—this is a RIE etch. |
| Step 19 The patterned photoresist guides the etch of the silicon layer—this is a DRIE etch. |
| Step 20 The photoresist is removed. |
| Step 21 A protective polyimide layer is applied to the top surface of the wafer while the bottom side is worked on. |
| Step 22 The bottom of the wafer is coated in photoresist. |
| Step 23 The photoresist is patterned with the dark field TRENCH mask. |
| Step 24 The patterned photoresist guides the etch of the bottom oxide—this is a RIE etch. |
| Step 25 The photoresist guides the etch of the substrate layer—this is a DRIE etch and causes a “blow out” towards the buried oxide layer. |
| Step 26 The patterned substrate guides the etch of the buried oxide layer—this is a wet oxide etch. |
| Step 27 The photoresist and bottom oxide layers are removed. |
| Step 28 The polyimide layer is removed with a dry etch process. The wafer is now ready to be cut, packaged, and shipped. |
